2.5.1 Basic Operation—Merits, Drawbacks, and Output Power Limits
This topology is simply two identical single-ended forward converters operating on alternate half cycles with their secondary currents adding through rectifying “on” diodes. The topology is shown in Figure 2.14.
The advantage, of course, is that now there are two power pulses per period, as seen in Figure 2.14, reducing the ripple current; also each converter supplies only half the total output power.
Equivalent flat-topped peak transistor current is derived from Eq. 2.28 asIpft = 3.13Pot/2Vdcwhere Pot is the total output power.
This transistor current is half that of a single forward converter at the same total output power. Thus the expense of two transistors is offset by the lower peak current rating and lower cost than that of the higher current rating device.
Looking at it another way, two transistors of the same current rating used at the same peak current as one single-ended converter at a given output power in an interleaved converter would yield twice the output power of the single converter.
Also, since the intensity of EMI generated is proportional to the peak current, not to the number of current pulses, an interleaved converter of the same total output power as a single forward converter will generate less EMI.
FIGURE2.14 Interleaved forward converter. Interleaving the “on” times of Q1 andQ2 on alternate half cycles, and summing their secondary outputs, gives two power pulses per period but avoids the flux-imbalance problem of the push-pull topology.
If this topology is compared to a push-pull, it might be thought that the push-pull is preferable. Although both are two-transistor circuits, the two transformers in the interleaved forward converter are prob- ably more expensive and occupy more space than a single large one in a push-pull circuit. But there is the ever-present uncertainty that the flux imbalance problem in the push-pull could appear under odd transient line and load conditions. The certainty that there is no flux imbalance in the interleaved forward converter is probably the best argument for its use.
There is one special, although not frequent, case where the inter- leaved forward converter is a much more desirable choice than a sin- gle forward converter of the same output power. This occurs when a DC output voltage is high—over about 200 V. In a single forward converter the peak reverse voltage experienced by the output free- wheeling diodes (D5AorD5B) is twice that for an interleaved forward converter as the duty cycle in the latter is twice that in the former.
This is no problem when output voltages are low, as can be seen in Eq. 2.25. Transformer secondary turns are always selected (for the single forward converter) so that at minimum DC input, when the secondary voltage is at its minimum, the duty cycleTon/Tneed not be more than 0.4 to yield the desired output voltage. Then for a DC output of 200 V, the peak reverse voltage experienced by the free- wheeling diode is 500 V. At the instant of power transistor turn “on,”
the free-wheeling diode has been carrying a large forward current and will suddenly be subjected to reverse voltage. If the diode has slow reverse recovery time, it will draw a large reverse current for a short time at 500-V reverse voltage and run dangerously hot.
Diodes with larger reverse voltage ratings generally have slower recovery times and can be a serious problem. The interleaved forward converter runs at twice the duty cycle and, for a 200 V-DC output, subjects the free-wheeling diode to only 250 V. This permits a lower voltage, faster-recovery diode with considerably lower dissipation.
2.5.2 Transformer Design Relations 2.5.2.1 Core Selection
The core for the two transformers will be selected from the aforemen- tioned charts, to be presented in Chapter 7, but it will be chosen for half the total power output that each transformer must supply.
2.5.2.2 Primary Turns and Wire Size
The number of primary turns in the interleaved forward converter is still given by Eq. 2.40, as each converter’s “on” time will still be 0.8T/2 at minimum DC input. The core iron areaAewill be read from
the catalogs for the selected core. Primary wire size will be chosen from Eq. 2.42 at half the total output power.
2.5.2.3 Secondary Turns and Wire Size
The number of secondary turns will be chosen from Eqs. 2.26 and 2.27, but therein the duty cycle will be 0.8 as there are two voltage pulses, each of duration 0.8T/2 atVdc. Wire size will still be chosen from Eq.
2.44, where Idcis the actual DC output current that each secondary carries at a maximum duty cycle of 0.4.
2.5.3 Output Filter Design 2.5.3.1 Output Inductor Design
The output inductor sees two current pulses per period, exactly like the output inductor in the push-pull topology. These pulses have the same width, amplitude, and duty cycle as the push-pull inductor at the same DC output current. Hence the magnitude of the inductance is calculated from Eq. 2.20 as for the push-pull inductor.
2.5.3.2 Output Capacitor Design
Similarly, the output capacitor “doesn’t know” whether it is filtering a full-wave secondary waveform from a push-pull topology or from an interleaved forward converter. Thus for the same inductor cur- rent ramp amplitude and permissible output ripple as the push-pull circuit, the capacitor is selected from Eq. 2.22.
Reference
1. K. Billings,Switchmode Power Supply Handbook, New York: McGraw-Hill, 1990.
C H A P T E R 3
Half- and Full-Bridge Converter Topologies