“Q boxes” is the abbreviation for boxes with an output parameter named “Q”. These are the memory boxes SR and RS, the edge evaluations P_TRIG and N_TRIG, and the timer and counter functions (Fig. 8.21).
With Q boxes, the first binary input (and in certain cases the associated parameter) must be connected, connection of the other inputs and outputs is optional.
8.4.1 Arrangement of Q boxes in the function block diagram When using Q boxes as program elements, you can:
b Program one single box per network, either within the logic operation or as its termination
b Arrange boxes in series by connecting the Q output of one box to a binary input of the following box, and
b Position boxes following T branches.
The circuits shown in Fig. 8.21 for the positioning of Q boxes use the memory box with two inputs as an example. This enables the possible positioning of all Q boxes to be shown.
Fig. 8.21 Overview of Q boxes available with FBD
RS memory box SR memory box
Evaluation with falling edge Evaluation with
rising edge
Timer functions TP, TON, TOF and TONR Counter functions CTU, CTD, CTUD Represented as local instance or with own data block
Binary variable Binary variable
SR RS
S R
R1 S1
Edge trigger flag Edge trigger flag
P_TRIG N_TRIG
CLK Q CLK
Q Q
Q
Function Function
#Instance
IN IN
...
...
...
...
...
...
...
Q ...
Q
“Instance”
Boxes with Q outputs
8.4.2 Memory boxes in the function block diagram
There are two versions of the memory boxes: as SR box (reset dominant) and as RS box (set dominant). In addition to the difference in the function name, the two boxes also differ in the positioning of the set and reset inputs.
The binary tag named above the memory box is set when the set input has signal state “1” and the reset input has signal state “0”. The binary tag is reset when “1” is present at the reset input and “0” at the set input. Signal state “0” at both inputs has no influence on the memory function. If signal state “1” is present simultaneously at both inputs, the two memory functions respond differently: the SR memory func- tion is reset, the RS memory function is set.
Fig. 8.22 Positioning of Q boxes using example of SR memory function
If both tags “Input 1” and “Input 2” in Fig. 8.23 simultaneously have the same signal state “1”, “Memory 1” is reset (function input R1 is dominant). If both “Input 3” and
“Input 4” simultaneously have the same signal state “1”, “Memory 2” is set (func- tion input S1 is dominant).
8.4.3 Edge evaluation of logic operation result in the function block diagram
The edge evaluation with Q boxes registers a change in the result of the logic oper- ation prior to the box. If the logic operation result changes from “0” to “1” (rising edge) at the CLK input of the P_TRIG box, signal state “1” is present at the Q output for the duration of one program cycle.
If the result of the logic operation changes from “1” to “0” (falling edge) at the CLK input of the N_TRIG box, the Q output is activated for the duration of one pro- gram cycle.
The P_TRIG or N_TRIG-Box must not terminate a logic operation.
Fig. 8.24 shows an example of Q boxes with edge evaluation. The tag “Memory 3” is set at the moment when both “Input 5” and “Input 6” have the signal state “1”. The memory function is reset at the moment when “Input 7” and “Input 0” both have signal state “1”.
Fig. 8.23 Memory boxes SR and RS
Fig. 8.24 Example of edge evaluation of the logic operation result (with Q boxes)
8.4.4 Example of binary scaler in the function block diagram A binary scaler has one input and one
output. If the signal at the input of the bi- nary scaler changes its state, e.g. from
“0” to “1”, the output also changes its sig- nal state. This (new) signal state is then retained until the next change, which is
positive in our example. Only then does the signal state of the output change again.
Half of the input frequency is then present at the binary scaler's output.
A solution for this task is shown in Fig. 8.25. If the tag “Input 1” has signal state “1”, the tag “Output 1” is set (“Memory 1” is still reset). If the signal state at “Input 1”
changes to “0”, “Memory 1” is also set (“Output 1” is then “1”). If “Input 1” is “1” the next time around, “Output 1” is reset again (“Memory 1” is now “1”). If “Input 1” is
“0” again, “Memory 1” is reset (since “Output 1” is now also reset). The “basic state”
has now been reached again following two input pulses and one output pulse.
8.4.5 Controlling IEC timer functions in the function block diagram with Q boxes
You can use the timer functions to implement timing processes in the program such as waiting and monitoring times, measurement of a time interval, or the gen- eration of pulses. An IEC timer function can be started with two different program elements: With a standard box (see Chapter 8.3.5 “Starting IEC timer functions in the function block diagram with standard boxes” on page 262) or with a Q box. Both variants are equally useful. A detailed description of the timer functions is provided in Chapter 10.4 “Time functions” on page 344.
A timer function can be started with one of the four behavior patterns TP, TON, TOF, and TONR. A timer function requires internal data for each application. You can Fig. 8.25 Example of binary scaler in function block diagram
Input
Output
specify where this data is to be saved when programming: For the Single instance entry in its own data block with the data type IEC_TIMER and for the Multi-instance entry in the instance data block of the calling function block with a data type that depends on the behavior of the timer function (TP_TIME, TON_TIME, TOF_TIME, TONR_TIME). You address a timer function with the name of the instance data – data block or local data.
The top timer function “Timer 1” in Fig. 8.26 saves its data as a local instance with the name #“Timer 1” in the calling function block. This is started with “Input 1” and
“Duration 1”. The tag “Output 1” has signal state “1” for as long as defined by the tag “Duration 1”.
The bottom timer function “Timer 2” saves its data in a separate data block
“Timer 2”. This is started with “Input 2” and “Duration 2”. After the time has elapsed, the tag “Output 2” has signal state “1”.
The name of the local instance (#“Timer 1”) and the name of the data block (“Timer 2”) address the respective timer functions. Component Q of the data struc- ture provides the status of the timer function and can also be scanned at other points in the user program.
8.4.6 IEC counter functions in the function block diagram
You can use the IEC counter functions to execute counting tasks directly using the control processor. The counter functions can count up and down; the numerical range depends on the data type of the preset value. The data types USINT, UINT, UDINT, SINT, INT and DINT are available.
The counting frequency of the counter functions depends on the execution time of the user program. In order to count, the CPU must recognize a change in the signal state of the input pulse, i.e. the input pulse and the pause must be present for at Fig. 8.26 Examples of timer functions
least one program cycle. The longer the program execution time, the lower the counting frequency. A detailed description of the counter functions is provided in Chapter 10.5 “Counter functions” on page 349.
A counter function can be controlled with one of the three behavior patterns CTU, CTD, and CTUD. A counter function requires internal data for each application. You can specify where this data is to be saved when programming: by specifying Single instance for storage in a separate data block, and by specifying Multi-instance for storage in the instance data block of the calling function block.
The data type of a counter function is based on the data type of the count value. If, for example, an up-counter (CTU) with a DINT count value is programmed as a sin- gle instance, the data type IEC_DCOUNTER is taken as a basis for the data block (see Chapter 4.8.2 “IEC_COUNTER system data type” on page 112); as a local instance, the counter function has the data type CTU_DINT (see Chapter 4.6.2 “Parameter types for IEC counter functions” on page 108). You address the counter function with the name of the instance data – data block or local data.
The top counter function “Counter 1” in Fig. 8.27 saves its data as a local instance with the name #“Counter 1” in the calling function block. The actual count value
“Count value 1” is set by “Input 4” to zero. “Input 3” increments the actual count value by one unit with each positive edge. If the count value reaches the default value “Preset value 1” and then exceeds it, the tag “Output 4” at output Q is set.
The second counter in the example is an up/down counter. “Input 7” sets the actual count value to zero, “Input 8” loads the default value “Preset value 2” as the actual count value. “Input 5” increments the count value by one unit with each positive change in signal, “Input 6” decrements the count value by one unit with each posi- tive change in signal.
Fig. 8.27 Examples of counter functions
The QU output has the signal state “1” if the actual count value at the CV output is equal to or greater than the default value at the PV input. The QD output has the sig- nal state “1” if the actual count value is zero or less than zero.
The lower QU output can be further connected directly. In the example, it is used to control the tag “Output 5”. The QD output cannot be supplied, but can be scanned indirectly via the corresponding component QD of the counter structure. (For the QU output, this would be the component QU.)
The name of the local instance (#“Counter 1”) and the name of the data block (“Counter 2”) address the respective counter function. In the example, “Counter 2”
has its own data block, and the QD output is scanned with the name “Counter 2”.QD.
The result of the query can be connected further, e.g. to control an assignment.