DIELECTRIC CHARACTERIZATION AND DOPANT PROFILE EXTRACTION USING SCANNING CAPACITANCE MICROSCOPY WONG KIN MUN (B.Eng. (Hons.), NUS) A THESIS SUBMITTED FOR THE DEGREE OF DOCTOR OF PHILOSOPHY DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING NATIONAL UNIVERSITY OF SINGAPORE 2006 ACKNOWLEDGEMENTS The author would like to express his heartfelt thanks and gratitude to his supervisor, Assoc. Prof. Chim Wai Kin, for his invaluable advice and guidance throughout the entire course of the project. He has imparted lots of knowledge and experience in the project-related area and his understanding and encouragement during the hard times are truly appreciated. The author is very thankful to Mr Steve Kwa and the staff of the Engineering Information Technology Unit (e-ITU) for their support during the project. The author is appreciative of the help and encouragement from his good friend, Mr Yan Jian during the Ph.D. candidature. The author would like to express his appreciation to Mrs CM Ho, Ms Anna Li and other staff of the Center for Integrated Circuit Failure Analysis and Reliability (CICFAR) for kindly providing support to him during the project. The author would also like to mention his appreciation to the research scholars from CICFAR lab, Jayson Koh, Merrvyn Tay, Yeow Hoe, Sing Yang, Jianxin, Szu Huat, Heng Wah, Alfred Quah, Soon Huat, Li Qi and others for the wonderful company and friendship they had provided. The author would also like to thank Mr. Walter Lim and research scholars of the Microelectronics Laboratory for all the help rendered in the preparation of the experimental samples. Finally, the author would like to thank anyone who has helped him in one way or another. i CONTENTS ACKNOWLEDGEMENTS i CONTENTS ii LIST OF FIGURES vi LIST OF TABLES xii SUMMARY xiii CHAPTER INTRODUCTION 1.1 Background 1.2 Motivation of the Project 1.3 Project Objectives 1.4 Thesis Outline CHAPTER LITERATURE SURVEY 2.1 Background 2.2 Initial Developments of Scanning Capacitance Microscopy (SCM) 10 2.3 SCM Dopant Profiling 11 2.3.1 Two-dimensional dopant profile extraction methods 11 2.3.2 Factors affecting the accuracy of SCM dopant profiling 15 2.4 Dielectric Characterization using SCM 19 2.5 Summary 21 CHAPTER THEORY 3.1 Introduction 22 3.2 Operation Principle of the SCM 23 ii 3.2.1 Theory of Operation of the SCM 24 3.2.2 The Working Principle of the SCM 27 3.2.3 UHF Resonant Capacitance Sensor 28 3.2.4 Differentiation of Carrier Types by Lock-in Amplifier 29 3.3 Description of Secondary Ion Mass Spectroscopy (SIMS) 30 3.4 Description of the C-V Characteristics of an Ideal Metal-OxideSemiconductor Capacitor 32 3.5 Effects of Metal-Semiconductor Work Function Difference and Oxide Fixed Charges 43 3.6 Effects of Interface Trapped Charges 48 3.7 Two-Frequency Corrected Technique on C-V Curves 52 3.8 Terman’s Method 58 3.9 Conductance Method 61 3.10 Summary 74 CHAPTER CAPACITANCE – VOLTAGE (C-V) AND SCANNING CAPACITANCE MICROSCOPY MEASUREMENTS ON HIGH AND LOW TEMPERATURE OXIDE SAMPLES 4.1 Introduction 75 4.2 Preparation of High Temperature Oxide Samples 76 4.3 Conductance Measurements on High Temperature Oxide Samples and Comparison using Terman’s Method 78 4.4 SCM dC/dV Measurements on High Temperature Oxide Samples and Full-Width at Half-Maximum (FWHM) Method for Monitoring Oxide Quality 83 4.5 SCM dC/dV Measurements on High Dielectric Constant Oxide Samples 92 4.6 Preparation of Low Temperature Oxide Samples 102 iii 4.7 Effect of Hydrogen Peroxide and Ultraviolet Irradiation on the Low Temperature Oxide Samples 105 4.8 Summary 110 CHAPTER THEORETICAL MODEL OF INTERFACE TRAP DENSITY FOR SCANNING CAPACITANCE MICROSCOPY DIELECTRIC MEASUREMENTS 5.1 Introduction 111 5.2 Motivation for developing a theoretical model of interface trap density extraction from SCM measurements 112 5.3 Development of a theoretical model of interface trap density using the spread of the differential capacitance characteristics 115 5.4 Measurement of the spatial distribution of interface trap density in strained channel transistors using the SCM theoretical model 125 5.5 Summary 135 CHAPTER DOPANT PROFILE EXTRACTION FROM SCANNING CAPACITANCE MICROSCOPY MEASUREMENTS ON P-N JUNCTIONS 6.1 Introduction 136 6.2 Preparation of the deep p-n junction samples 137 6.3 Inverse modeling of SCM data from deep p-n junctions using the ratio calibration method 138 6.4 Preparation of the shallow p-n junction samples 145 6.5 Analytical model for direct conversion of SCM ΔC value into dopant concentration 147 6.6 Inverse modeling of SCM data from shallow p-n junctions using the ratio calibration method and analytic model 167 6.7 Summary 177 iv CHAPTER CONTRAST REVERSAL EFFECT IN SCANNING CAPACITANCE MICROSCOPY DOPANT CONCENTRATION EXTRACTION 7.1 Introduction 178 7.2 Sample preparation, SCM measurements on the multiple dopant step sample and theoretical simulations 179 7.3 Understanding the physical processes causing SCM contrast reversal from theoretical simulations 183 7.4 Summary 189 CHAPTER 8.1 8.2 CONCLUSION AND RECOMMENDATIONS Conclusion 190 8.1.1 Dielectric characterization using SCM 191 8.1.2 SCM dopant profile extraction 192 Recommendations for Future Work 194 197 REFERENCES APPENDIX A: LIST OF PUBLICATIONS 208 v LIST OF FIGURES Figure 2.1 : The different types of scanning probe microscopy techniques Figure 3.1 : Schematic layout of a SCM detection system [67] 25 Figure 3.2 : Change in capacitance due to an alternating electric field in accumulation [67] 25 Figure 3.3 : Change in capacitance due to an alternating electric field in depletion [67] 25 Figure 3.4 : Change in capacitance vs applied ac voltage for a n-type substrate 28 Figure 3.5 : Capacitance sensor resonant tuning curves for two values of tip/sample capacitance value [67] 29 Figure 3.6 : Schematic of the SCM lock-in amplifier 29 Figure 3.7 : Graphical definition of φ (x) and φ s 32 Figure 3.8 : Relationship between φ (x) and the energy band bending 33 Figure 3.9 : Variation of total charge density in silicon as a function of surface band bending [68] 36 Figure 3.10 : Small equivalent circuit of a MOS capacitor [68] 38 Figure 3.11 : C-V characteristics for different conditions : (a) low frequency, (b) high frequency and (c) deep depletion [68] 43 Figure 3.12 : Potential band diagram of a metal-oxide-semiconductor system 44 Figure 3.13 : Ideal C-V curve shifted by work function difference and oxide fixed charge 48 Figure 3.14 : Stretch-out of the C-V curve due to interface trapped charges 50 Figure 3.15 : Small signal equivalent circuit model of the MOS capacitor 53 Figure 3.16 : Series circuit model for MOS capacitor 54 Figure 3.17 : Parallel circuit model for MOS capacitor 54 Figure 3.18 : High frequency C-V measurements of the MOS capacitor 55 Figure 3.19 : Two-frequency corrected C-V curves 57 vi Figure 3.20 : Comparison between a measured two-frequency corrected C-V curve with an ideal high frequency C-V curve 59 Figure 3.21 : Comparison of a measured high frequency C-V curve with stretchout effect to the ideal high frequency C-V curve 60 Figure 3.22 : A graph of ΔVg vs ψ s for extraction of interface traps 60 Figure 3.23 : Equivalent circuit of the MOS capacitor for the average interface trap admittance [79] 64 Figure 3.24 : A calculated 〈Gp〉/ω vs f curve [79] 66 Figure 3.25 : Plot of ξp which is the maximum of 〈Gp〉/ω as a function of σs [79]67 Figure 3.26 : Plot of fD as a function of σs [79] 67 ⎛ξ ⎞ Figure 3.27 : Plot of ln⎜⎜ + ⎟⎟ as a function of σs for various choices of the ⎝ξ− ⎠ fractional value for the width fw [79] 68 Figure 3.28 : Equivalent circuit of the MOS capacitor biased in accumulation [79] 71 Figure 3.29 : Simplified circuit used to extract the value of Cox and Rs from the measured admittance in accumulation [79] 72 Figure 4.1 : Two-frequency (100 kHz and 200 kHz) corrected C-V curve for the nitrided gate oxide sample C3p1 79 Figure 4.2 : A family of 〈Gp〉/ω vs f curves at different applied gate bias for sample C3p1 81 Figure 4.3 : The energy distribution of the interface trap density for sample C3p1 obtained using the conductance method and Terman’s method 82 Figure 4.4 : The energy distribution of the interface trap density for the different samples in Table 4.1. Etrap - Ei represents the energy of the interface trap with respect to the intrinsic Fermi energy 83 Figure 4.5 : SCM schematic setup 84 Figure 4.6 : Measured dC/dV versus probe tip (Vtip) for samples C3p1 and C3p2 86 vii Figure 4.7 : Calculated dC/dV versus probe tip (Vtip) for samples C3p1 and C3p2. The calculated dC/dV plot for zero interface trap density and zero oxide fixed charge (circle symbol) is also shown 86 Figure 4.8 : Measured dC/dV versus probe tip (Vtip) for samples M4p1 and M4p2 88 Figure 4.9 : Calculated dC/dV versus probe tip (Vtip) for samples M4p1 and M4p2 88 Figure 4.10 : Plot of |Vtip(average)| versus Dit(mg) or Nf for the oxide (SiO2) samples 89 Figure 4.11 : Plot of FWHM for the oxide (SiO2) samples against their midgap 91 interface trap density Dit(mg) Figure 4.12 : dC/dV curves for a range of ac voltage biases at a fixed sweep rate for the nitrided HfO2 sample 94 Figure 4.13 : dC/dV curves for varying sweep rates at a fixed ac voltage bias of 0.1V for the nitrided HfO2 sample 96 Figure 4.14 : Measured dC/dV versus probe tip bias (Vtip) for the high-k HfO2 sample 98 Figure 4.15 : Plot of |Vtip(average)| versus Dit(mg) or Nf for SiO2 and the high-k nitrided HfO2 samples 101 Figure 4.16 : FWHM values for the various samples (SiO2 and high-k) plotted against the mid-gap interface trap density 102 Figure 4.17 : dC/dV vs V curve for the low temperature oxide without hydrogen peroxide immersion and UV irradiation 105 Figure 4.18 : dC/dV vs V curve for the low temperature oxide grown with hydrogen peroxide immersion 106 Figure 4.19 : Effect of the hydrogen peroxide immersion on the smoothed dC/dV curves showing differences in the interfacial quality of the low temperature oxide grown 106 Figure 4.20 : Schematic C-V diagram to explain the spurious peak in the dC/dV curve as a result of deep depletion effect and the return to equilibrium 107 Figure 4.21 : dC/dV vs V curve for the low temperature oxide grown with hydrogen peroxide immersion and UV light irradiation 108 viii Figure 4.22 : Effect of the hydrogen peroxide immersion and UV light irradition on the smoothed dC/dV curves of the low temperature oxide grown 109 Figure 5.1 : Schematic diagram of the SCM measurement setup with a typical 114 dC / dV versus Vg characteristics curve [64] Figure 5.2 : Comparison of Dit values calculated and extracted using the SCM theoretical model with that from conductance measurement 124 Figure 5.3 : Cross-sectional schematic diagram of the strained channel transistor 127 Figure 5.4 : Typical plots of the dC / dV versus Vtip characteristic at the center of the channel and near the S/D regions 128 Figure 5.5 : Spatial distribution of the Dit values, extracted from SCM measurements and calculated using the developed theoretical model, at the center of the channel (corresponding to x = nm) and at other spatial locations in increments of 50 nm from x = nm 131 Figure 5.6 : Germanium concentration, obtained from energy dispersive X-ray spectroscopy measurements, along the [110] channel direction at different locations “1” to “5” for one half of a strained channel transistor structure with the cross-section TEM image of the transistor as an inset. The transistor has a gate length of 50 nm. 132 Figure 6.1 : Mesh structure for modeling in MEDICI 140 Figure 6.2 : Experimental SCM ΔC profile for the deep p-n junction 141 Figure 6.3 : Forward simulation of ΔC profile for different values of N F and 142 Dit Figure 6.4 : Inverse modeling for the SCM experimental ΔC curve showing the target ΔC , initial ΔC and the ΔC profiles at the 74th and 104th iterations 145 Figure 6.5 : Plot of dopant concentration against depth using the TSUPREM4 simulation for Sample A 152 Figure 6.6 : Plot of the SIMS dopant concentration against depth for Sample A 152 Figure 6.7 : Comparison of the extracted SCM dopant profile from the theoretical model with the SIMS dopant profile for Sample A 153 ix taking the deep-depletion effect into consideration, was developed and its validity was verified by comparing the dopant profile extracted using the analytical model with the measured SIMS profile on sample A. For the other shallow junction samples, it was found that the dopant profile calculated (extracted) from the model could provide a fairly good initial guess for faster convergence in inverse modeling. 8.2 Recommendations for Future Work The extraction of dopant concentration from the SCM results usually involves the use of two-dimensional or three-dimensional numerical approaches as the analyses are mathematically very challenging. Hence presently, there is no available theoretical analytical model for accurate dopant profile extraction from very shallow p-n junctions, with junction depths of less than 50 nm. There could be some other important fundamental physical processes (besides the deep depletion effect) for these very shallow p-n junctions which need to be further investigated and understood. Further work can focus on this together with developing a theoretical model, incorporating these effects, for very shallow p-n junctions, which allows quick and direct conversion of the dC/dV signal into dopant profile. Such a theoretical model can be used as a convenient method for observing and understanding the impact of process changes on the dopant concentration profile, which is very crucial to the operation of sub-100 nm technology MOSFET devices. Furthermore, the use of the analytical model in obtaining the dopant profile will save a large amount of computation time as compared to more rigorous numerical simulation. 194 A theoretical quantitative model which relates the changes in FWHM to Dit has been developed to calculate the interface trap density at midgap directly from the SCM differential capacitance characteristic. However, the theoretical model (based on the fundamental capacitance-voltage equations for a MOS structure) can only be applied for low substrate dopant concentration of less than x1017 cm −3 and is not applicable for devices fabricated from sub-100 nm technologies with substrate dopant concentration in the mid or high 1017 cm −3 range. Therefore it would be useful to extend the validity of the theoretical model for devices with higher substrate dopant concentrations (> x1017 cm −3 ). The model can then be used to monitor the oxide interfacial quality directly after the oxidation process, which can reflect important information on the effects of certain processes. In addition, further work could also reformulate the model such that it could extract the energy distribution of the interface trap density across the silicon bandgap, instead of just giving the mid-gap interface trap density, so that more useful information can be obtained. Due to the high spatial resolution of SCM, it can be used to characterize nanoscale structures such as nanocrystals and nanowires. One avenue for further investigation could be the defectiveness of semiconductor nanocrystals under certain annealing conditions. Since the nanocrystals can store charges, therefore by examining the polarity and magnitude of the dC/dV characteristics from the SCM measurements, the amount and type of charges stored as a result of defects in the semiconductor nanocrystals can be understood. In addition, the changes in the distribution of the defects (which changes the amount of trapped charges) under different annealing conditions can be monitored using SCM. On the other 195 hand, there are indications, from analysis using transmission electron microscopy and Raman spectroscopy, that mechanical stress may affect the formation of the nanocrystals which would lead to defects that can trap or store charges. Similarly, the degree of mechanical stress on the nanocrystals can be examined using the dC/dV versus Vtip characteristics (i.e., monitoring changes in FWHM and Vtip corresponding to peak dC/dV) from SCM measurements. The other type of nanoscale structures that can be investigated using the SCM is single-walled carbon nanotubes (SWNT) consisting of a single graphen sheet wrapped up to form a tube with nanometer-scale diameter [104]. These carbon nanotubes can behave electrically as either metal or semiconductor with electrical properties as good as the silicon semiconductor. Therefore, these single-walled carbon nanotubes have the potential for electronic applications, where n-type doping was first achieved using the donated electrons from alkali metals to the nanotube to create n-type transistors [105] and other devices. As a result, SCM can be used to characterize the oxide interfacial quality of these carbon nanotube transistors so as to optimize the fabrication and electronic properties of this promising new class of electronic materials for future applications. 196 REFERENCES [1] The International Technology Roadmap for Semiconductors (ITRS) is published by the Semiconductor Industry Association, 4300 Stevens Creek Boulevard, San Jose, CA 95129. [2] C.C. Williams, “Two-dimensional dopant profiling by scanning capacitance microscopy”, Annual Review of Materials Science, vol. 29, pp. 471-504, 1999. [3] A.C. Diebold, M.R. Kump, J.J. Kopanski, and D.G. Seiler, “Characterization of two-dimensional dopant profiles: Status and review”, Journal of Vacuum Science and Technology B, vol. 14, no. 1, pp. 196-201, 1996. [4] Y.Huang, C.C. Williams, and J.Slinkman, “Quantitative two-dimensional dopant profile measurment and inverse modeling by scanning capacitance microscopy”, Applied Physics Letters, vol. 66, no. 3, pp. 344-346, 1995. [5] R.N. Kleiman, M.L. O’Malley, F.H. Baumann, J.P. Garno, and G.L. Timp, “Scanning capacitance microscopy imaging of silicon metal-oxidesemiconductor field effect transistors”, Journal of Vacuum Science and Technology B, vol. 18, no. 4, pp. 2034-2038, 2000. [6] P. De Wolf, T. Clarysse, W. Vandervorst, and L. Hellemans, “Low weight spreading resistance profiling of ultrashallow dopant profiles”, Journal of Vacuum Science and Technology B, vol. 16, no. 1, pp. 401-405, 1998. [7] M. Barrett, M. Dennis, D. Tiffin, Y. Li, and C.K. Shih, “2-D dopant profiling in VLSI devices using dopant-selective etching: an atomic force microscopy study”, IEEE Electron Device Letters, vol. 16, no. 3, pp. 118120, 1995. [8] G.J.L. Ouwerling, “Physical parameter extraction by inverse device modeling: Application to one- and two-dimensional doping profiling”, Solid-State Electronics, vol. 33, no. 6, pp. 757-771, 1990. [9] Z.K. Lee, M.B. McIlrath, and D.A. Antoniadis, “Two-dimensional doping profile characterization of MOSFET’s by inverse modeling using I-V characteristics in the subthreshold region”, IEEE Transactions of Electron Devices, vol. 46, no. 8, pp. 1640-1649, 1999. 197 [10] C.Y.T. Chiang, Y.T. Yeow, and R Ghodsi, “Inverse modeling of 2dimensional MOSFET dopant profile via capacitance of the source/drain gated diode”, IEEE Transactions of Electron Devices, vol. 47, no. 7, pp. 1385-1392, 2000. [11] M.L. O'Malley, G.L. Timp, S.V. Moccio, J.P. Garno, and R.N. Kleiman, “Quantification of scanning capacitance microscopy imaging of the pn junction through electrical stimulation”, Applied Physics Letters, vol. 74, no. 2, pp. 272-274, 1999. [12] H. Edwards, V.A. Ukraintsev, R.S. Martin, F.S. Johnson, P. Menz, S. Walsh, S. Ashburn, K. S. Wills, K. Harvey, and M.-C. Chang, “p-n junction delineation in Si devices using scanning capacitance spectroscopy”, Journal of Applied Physics, vol. 87, no. 3, pp. 1485-1495, 2000. [13] T. Yamamoto, Y. Suzuki, H. Sugimura, and N. Nakagiri, “SiO2/Si system studied by scanning capacitance microscopy”, Japanese Journal of Applied Physics, pt. 1, vol. 35, no. 6B, pp. 3793-3797, 1996. [14] N. Nordell, O. Bowallius, S. Anand, A. Kakanakova-Georgieva, R. Yakimova, L.D. Madsen, S. Karlsson, and A.O. Konstantinov, “Polytype homogeneity and doping distribution in homoepitaxial 4H SiC grown on nonplanar substrates”, Applied Physics Letters, vol. 80, no. 10, pp. 17551757, 2002. [15] M. Hammar, E. Rodriguez Messmer, M. Luzuy, S. Anand, S. Lourdudoss, and G. Landgren, “Topography dependent doping distribution in selectively regrown InP studied by scanning capacitance microscopy”, Applied Physics Letters, vol. 72, no. 7, pp. 815-817, 1998. [16] K.V. Smith, X.Z. Dang, E.T. Yu, and J.M. Redwing, “Charging effects in AlGaN/GaN heterostructures probed using scanning capacitance microscopy”, Journal of Vacuum Science and Technology B, vol. 18, no. 4, pp. 2304-2308, 2000. [17] M.L. O'Malley, G.L. Timp, W. Timp, S.V. Moccio, J.P. Garno, and R.N. Kleiman, “Electrical simulation of scanning capacitance microscopy imaging of the pn junction with semiconductor probe tips”, Applied Physics Letters, vol. 74, no. 24, pp. 3672-3674, 1999. 198 [18] J. Smoliner, B. Basnar, S. Golka, E. Gornik, B. Löffler, M. Schatzmayr, and H. Enichlmair, “Mechanism of bias-dependent contrast in scanningcapacitance-microscopy images”, Applied Physics Letters, vol. 79, no. 19, pp. 3182-3184, 2001. [19] W.K. Chim, K.M. Wong, Y.T. Yeow, Y.D. Hong, Y. Lei, L.W. Teo, and W.K. Choi, “Monitoring oxide quality using the spread of the dC/dV peak in scanning capacitance microscopy measurements”, IEEE Electron Device Letters, vol. 24, no. 10, pp. 667-670, 2003. [20] G. Binnig, H. Rohrer, Ch. Gerber, and E. Weibel, “Surface studies by scanning tunneling microscopy”, Physical Review Letters, vol. 49, no. 1, pp. 57-61, 1982. [21] G. Binning, C.F. Quate, and Ch. Gerber, “Atomic force microscope”, Physical Review Letters, vol. 56, no. 9, pp. 930-933, 1986. [22] B.D. Terris, J.E. Stern, D. Rugar, and H.J. Mamin, “Contact electrification using force microscopy”, Physical Review Letters, vol. 63, no. 24, pp. 2669-2672, 1989. [23] C.C. Williams, and H.K. Wickramasinghe, “Scanning thermal profiler”, Applied Physics Letters, vol. 49, no. 23, pp. 1587-1589, 1986. [24] P. Grütter, D. Rugar, and H.J. Mamin, “Magnetic force microscopy of magnetic materials”, Ultramicroscopy, vol. 47, no. 4, pp. 393-399, 1992. [25] D.W. Pohl, W. Denk, and M. Lanz, “Optical stethoscopy: Image recording with resolution λ/20”, Applied Physics Letters, vol. 44, no. 7, pp. 651-653, 1984. [26] J.R. Matey, and J. Blanc, “Scanning capacitance microscopy”, Journal of Applied Physics, vol. 57, no. 5, pp. 1437-1444, 1985. [27] C.D. Bugg, and P.J. King, “Scanning capacitance microscopy”, Journal of Physics E : Scientific Instruments, vol. 21, no. 2, pp. 147-151, 1988. [28] H.P. Kleinknecht, J.R. Sandercock, and H. Meier, Scanning Microscopies, vol. 2, pp. 1839, 1988. [29] C.C. Williams, J. Slinkman, W.P. Hough, and H.K. Wickramasinghe, “Lateral dopant profiling with 200 nm resolution by scanning capacitance microscopy”, Applied Physics Letters, vol. 55, no. 16, pp. 1662-1664, 1989. 199 [30] R.C. Barrett, and C.F. Quate, “Charge storage in a nitride-oxide-silicon medium by scanning capacitance microscopy”, Journal of Applied Physics, vol. 70, no. 5, pp. 2725-2733, 1991. [31] J.S. McMurray, J. Kim, and C.C. Williams, “Quantitative measurement of two-dimensional dopant profile by cross-sectional scanning capacitance microscopy”, Journal of Vacuum Science and Technology B, vol. 15, no. 4, pp. 1011-1014, 1997. [32] J.S. McMurray, and C.C. Williams, “Inverse modeling applied to scanning capacitance microscopy for improved spatial resolution and accuracy”, American Institute of Physics Conference Proceedings, vol. 449, pp. 731735, 1998. [33] E.M. Vogel, C.A. Richter, and B.G. Rennex, “A capacitance–voltage model for polysilicon-gated MOS devices including substrate quantization effects based on modification of the total semiconductor charge”, SolidState Electronics, vol. 47, no. 9, pp. 1589-1596, 2003. [34] J.F. Marchiando, J.J. Kopanski, and J.R. Lowney, “Model database for determining dopant profiles from scanning capacitance microscope measurements”, Journal of Vacuum Science and Technology B, vol. 16, no. 1, pp. 463-470, 1998. [35] J.F. Marchiando, and J.J. Kopanski, “Regression procedure for determining the dopant profile in semiconductors from scanning capacitance microscopy data”, Journal of Applied Physics, vol. 92, no. 10, pp. 5798-5809, 2002. [36] J.F. Marchiando, and J.J. Kopanski, “On calculating scanning capacitance microscopy data for a dopant profile in semiconductors”, Journal of Vacuum Science and Technology B, vol. 22, no. 1, pp. 411-416, 2004. [37] I.J. Djomehri, and D.A. Antoniadis, “Inverse modeling of sub-100 nm MOSFETs using C-V and I-V”, IEEE Transactions of Electron Devices, vol. 49, no. 4, pp. 568-575, 2002. [38] J.F. Marchiando, J.J. Kopanski, and J. Albers, “Limitations of the calibration curve method for determining dopant profiles from scanning capacitance microscope measurements”, Journal of Vacuum Science and Technology B, vol. 18, no. 1, pp. 414-417, 2000. 200 [39] B.G. Rennex, J.J. Kopanski, and J.F. Marchiando, “FASTC2D: Software for extracting 2D carrier profiles from scanning capacitance microscopy images”, American Institute of Physics Conference Proceedings, vol. 550, pp. 635-640, 2001. [40] J. Yang, and Y.T. Yeow, “Modeling study of scanning capacitance microscopy measurement for p-n junction dopant profile extraction”, Solid-State and Integrated-Circuit Technology Proceedings, 6th International Conference, vol. 2, pp. 22-25, 2001. [41] MEDICI: Two-Dimensional Device Simulation Program, TMA Associates, Palo Alto, CA, 1994. [42] W.K. Chim, K.M. Wong, Y.L. Teo, Y. Lei, and Y.T. Yeow, “Dopant extraction from scanning capacitance microscopy measurements of p-n junctions using combined inverse modeling and forward simulation”, Applied Physics Letters, vol. 80, no. 25, pp. 4837-4839, 2002. [43] R. Stephenson, A. Verhulst, P. De Wolf, M. Caymax, and W. Vandervorst, “Nonmonotonic behavior of the scanning capacitance microscope for large dynamic range samples”, Journal of Vacuum Science and Technology B, vol. 18, no. 1, pp. 405-408, 2000. [44] P. Malberti, L. Ciampolini, M. Ciappa, and W. Fichtner, “Experimental investigation and 3D simulation of contrast reversal effects in scanning capacitance microscopy”, American Institute of Physics Conference Proceedings, vol. 550, pp. 652-656, 2001. [45] D. Goghero, V. Raineri, and F. Giannazzo, “Study of interface states and oxide quality to avoid contrast reversal in scanning capacitance microscopy”, Applied Physics Letters, vol. 81, no. 10, pp. 1824-1826, 2002. [46] K.M. Wong, W.K. Chim, and J. Yan, “Physical mechanism of oxide interfacial traps, carrier mobility degradation and series resistance on contrast reversal in scanning-capacitance-microscopy dopant concentration extraction”, Applied Physics Letters, vol. 87, no. 5, article no. 053504, pp. 053504-1 to 053504-3, 2005. [47] Y.D. Hong, Y.T. Yeow, W.K. Chim, K.M. Wong, and J.J. Kopanski, “Influence of interface traps and surface mobility degradation on scanning 201 capacitance microscopy measurment”, IEEE Transactions of Electron Devices, vol. 51, no. 9, pp. 1496-1503, 2004. [48] V. V. Zavyalov, J. S. McMurray, and C. C. Williams, “Noise in scanning capacitance microscopy measurements”, Journal of Vacuum Science and Technology B, vol. 18, no. 3, pp. 1125-1133, 2000. [49] G.H. Buh, J.J. Kopanski, and J.F. Marchiando, and A.G. Birdwell, “Factors influencing the capacitance-voltage characteristics measured by the scanning capacitance microscope”, Journal of Applied Physics, vol. 94, no. 4, pp. 2680-2685, 2003. [50] G. H. Buh, and J. J. Kopanski, “Atomic force microscope laser illumination effects on a sample and its application for transient spectroscopy”, Applied Physics Letters, vol. 83, no. 12, pp. 2486-2488, 2003. [51] E. Bussmann, and C.C. Williams, “Sub-10 nm lateral spatial resolution in scanning capacitance microscopy achieved with solid platinum probes”, Review of Scientific Instruments, vol. 75, no. 2, pp. 422-425, 2004. [52] H. Yabuhara, M. Ciappa, and W. Fichtner, “Scanning capacitance microscopy measurements using diamond-coated probes”, Journal of Vacuum Science and Technology B, vol. 20, no. 3, pp. 783-786, 2002. [53] S. Lanyi, “Effect of tip shape on capacitance determination accuracy in scanning capacitance microscopy”, Ultramicroscopy, vol. 103, no. 3, pp. 221-228, 2005. [54] F. Giannazzo, F. Priolo, V. Raineri, and V. Privitera, “High-resolution scanning capacitance microscopy of silicon devices by surface beveling”, Applied Physics Letters, vol. 76, no. 18, pp. 2565-2567, 2000. [55] N. Duhayon, T. Clarysse, P. Eyben, W. Vandervorst, and L. Hellemans, “Detailed study of scanning capacitance microscopy on cross-sectional and beveled junctions”, Journal of Vacuum Science and Technology B, vol. 20, no. 2, pp. 741-746, 2002. [56] T. Clarysse, W. Vandervorst, and A. Casel, “Quantitative analysis of on bevel electrical junction shifts due to carrier spilling effects”, Applied Physics Letters, vol. 57, no. 26, pp. 2856-2858, 1990. [57] T. Clarysse, P. Eyben, N. Duhayon, M.W. Xu, and W. Vandervorst, “Carrier spilling revisited: On-bevel junction behavior of different 202 electrical depth profiling techniques”, Journal of Vacuum Science and Technology B, vol. 21, no. 2, pp. 729-736, 2003. [58] P. Eyben, N. Duhayon, T. Clarysse, and W. Vandervorst, “Bias-induced junction displacements in scanning spreading resistance microscopy and scanning capacitance microscopy”, Journal of Vacuum Science and Technology B, vol. 21, no. 2, pp. 737-743, 2003. [59] L.M. Terman, “An investigation of surface states at a silicon/silicon oxide interface employing metal-oxide-silicon diodes”, Solid-State Electronics, vol. 5, no. 5, pp. 285-299, 1962. [60] O. Bowallius, and S. Anand, “Evaluation of different oxidation methods for silicon for scanning capacitance microscopy”, Materials Science in Semiconductor Processing, vol. 4, no. 1-3, pp. 81-84, 2001. [61] J. Yang, and F.C.J. Kong, “Simulation of interface states effect on the scanning capacitance microscopy measurement of p-n junctions”, Applied Physics Letters, vol. 81, no. 26, pp. 4973-4975, 2002. [62] J. Yang, J. J. Kopanski, A. Postula, and M. Bialkowski, “Experimental investigation of the dielectric-semiconductor interface with scanning capacitance microscopy”, Microelectronics Reliability, vol. 45, no. 5-6, pp. 887-890, 2005. [63] J.J. Kopanski, W.R. Thurber, and M.L. Chun, “Characterization of the silicon dioxide-silicon interface with the scanning capacitance microscope”, Interfaces in Electronic Materials, Electrochemical Society Symposium, Orlando, Florida, October 13-16, 2003. [64] K.M. Wong, and W.K. Chim, “Theoretical model of interface trap density using the spread of the differential capacitance characteristics in scanning capacitance microscopy measurements”, Applied Physics Letters, vol. 88, no. 8, article no. 083510, pp. 083510-1 to 083510-3, 2006. [65] D.K. Schroder, Semiconductor Material and Device Characterization. John Wiley & Sons Inc., 1998, ch. 2, pp. 80-90. [66] N. Arora, MOSFET Models for VLSI Circuit Simulation : Theory and Practice. New York : Springer-Verlag, 1993. [67] Digital Instruments Metrology Group, Scanning Capacitance Microscopy Support Note, no. 224, Rev. D, 1999. 203 [68] Y. Taur, and T.H. Ning, Fundamentals of Modern VLSI Devices. Cambridge University Press, 1998, ch. 2, pp. 65-71. [69] D.K. Schroder, Semiconductor Material and Device Characterization. John Wiley & Sons Inc., 1998, ch. 6, pp. 337-419. [70] R.F. Pierret, Field Effect Devices. Addison-Wesley, 1990, ch. 4, pp. 103106. [71] E.H. Nicollian, and J.R. Brews, MOS (Metal Oxide Semiconductor) Physics and Technology. John Wiley & Sons Inc., 1991, ch. 8, pp. 321325. [72] J.F. Lønnum, and J.S. Johannessen, “Dual-frequency modified C/V technique”, Electronics Letters, vol. 22, no. 9, pp. 456-457, 1986. [73] K.J. Yang, and C. Hu, “MOS capacitance measurements for high-leakage thin dielectrics”, IEEE Transactions of Electron Devices, vol. 46, no. 7, pp. 1500-1501, 1999. [74] J.R. Brews, “Rapid interface parameterization using a single MOS conductance curve”, Solid-State Electronics, vol. 26, no. 8, pp. 711-716, 1983. [75] E.H. Nicollian, and J.R. Brews, MOS (Metal Oxide Semiconductor) Physics and Technology. John Wiley & Sons Inc., 1991, ch. 5, pp. 177. [76] W. Shockley, and W.T. Read, “Statistics of the recombinations of holes and electrons”, Physical Review, vol. 87, no. 5, pp. 835-842, 1952. [77] R.N. Hall, “Electron-hole recombination in germanium”, Physical Review, vol. 87, no. 2, pp. 387, 1952. [78] E. H. Nicollian, and A. Goetzberger, Bell System Technical Journal, vol. 46, pp. 1055, 1967. [79] E.H. Nicollian, and J.R. Brews, MOS (Metal Oxide Semiconductor) Physics and Technology. John Wiley & Sons Inc., 1991, ch. 5, pp. 209225. [80] E.H. Nicollian, and J.R. Brews, MOS (Metal Oxide Semiconductor) Physics and Technology. John Wiley & Sons Inc., 1991, ch. 2, 3. [81] K.F. Schuegraf, C.C. King, and C. Hu, “Ultra-thin dioxide leakage current and scaling limit”, Symposium on VLSI Technology, Digest of Techical Papers, pp. 18-19, 1992. 204 [82] C.N. Berglund, “Surface states at steam-grown silicon-silicon dioxide interfaces”, IEEE Transactions of Electron Devices, vol. 13, no. 10. pp. 701705, 1966. [83] N.M. Johnson, D.K. Biegelsen, M.D. Moyer, S.T. Chang, E.H. Poindexter, and P.J. Caplan, “Characteristic electronic defects at the Si-SiO2 interface”, Applied Physics Letters, vol. 43, no. 6, pp. 563-565, 1983. [84] G. Groeseneken, H.E. Maes, N. Beltran, and R.F. De Keersmaecker, “A reliable approach to charge-pumping measurements in MOS transistors”, IEEE Transactions of Electron Devices, vol. 31, no. 1, pp. 42-53, 1984. [85] E.H. Nicollian, and J.R. Brews, MOS (Metal Oxide Semiconductor) Physics and Technology. John Wiley & Sons Inc., 1991, ch. 6, pp. 235256. [86] B.G. Tabachnick, and L.S. Fidell, Using Multivariate Statistics. New York: Harper Collins, 1996. [87] R.R. Razouk, and B.E. Deal, “Dependence of interface state density on silicon thermal oxidation process variables”, Journal of the Electrochemical Society, vol. 126, no. 9, pp. 1573-1581, 1979. [88] S. Takagi, A. Toriumi, M. Iwase, and H. Tango, “On the universality of inversion layer mobility in Si MOSFET's : Part I - effects of substrate impurity concentration”, IEEE Transactions of Electron Devices, vol. 41, no. 12, pp. 2357-2362, 1994. [89] T. Ghani, M. Armstrong, C. Auth, M. Bost, P. Charvat, G. Glass, T. Hoffmann, K. Johnson, C. Kenyon, J. Klaus, B. Mclntyre, K. Mistry, A. Murthy, J. Sandford, M. Silberstein, S. Sivakumar, P. Smith, K. Zawadzki, S. Thompson, and M. Bohr, “A 90nm high volume manufacturing logic technology featuring novel 45nm gate length strained silicon CMOS transistors”, International Electron Devices Meeting Technical Digest, pp. 978-980, 2003. [90] D.K. Nayak, and S.K. Chun, “Low-field hole mobility of strained Si on (100) Si1-xGex substrate”, Applied Physics Letters, vol. 64, no. 19, pp. 2514-2516, 1994. 205 [91] C.G. Ahn, H.S. Kang, Y.K. Kwon, S.M. Lee, B.R. Ryum, and B.K. Kang, “Oxidation-induced traps near SiO2/SiGe interface”, Applied Physics Letters, vol. 86, no. 3, pp. 1542-1547, 1999. [92] H.K. Liou, P. Mei, U. Gennser, and E.S. Yang, “Effects of Ge concentration on SiGe oxidation behavior”, Applied Physics Letters, vol. 59, no. 10, pp. 1200-1202, 1991. [93] K.W. Ang, K.J. Chui, V. Bliznetsov, C.H. Tung, A. Du, N. Balasubramanian, G. Samudra, M.F. Li, and Y.C. Yeo, “Lattice strain analysis of transistor structures with silicon–germanium and silicon– carbon source/drain stressors”, Applied Physics Letters, vol. 86, no. 9, article no. 093102, pp. 093102-1 to 093102-3, 2005. [94] G.K. Dalapati, S. Chattopadhyay, K.S.K. Kwa, S.H. Olsen, Y.L. Tsang, R. Agaiby, A.G. O’Neil, P. Dobrosz, and S.J. Bull, IEEE Transactions of Electron Devices, vol. 53, no. 5, pp. 1142-1152, 2006. [95] TSUPREM4 : Two-Dimensional Process Simulation Program, TMA Associates, Palo Alto, CA, 1994. [96] B. Adolph, Field-Effect and Bipolar Power Transistor Physics. New York : Academic Press, 1981. [97] A.A. Vol’fson, and V.K. Subashiev, Soviet Physics-Semiconductors, vol. 1, pp. 327, 1967. [98] M.S. Mock, “On heavy doping effects and the injection efficiency of silicon transistors”, Solid-State Electronics, vol. 17, no. 8, pp. 819-824, 1974. [99] M.S. Mock, “Transport equations in heavily doped silicon, and the current gain of a bipolar transistor”, Solid-State Electronics, vol. 16, no. 11, pp. 1251-1259, 1973. [100] R.J. Van Overstraeten, H.J. DeMan, and R.P. Mertens, “Transport equations in heavy doped silicon”, IEEE Transactions of Electron Devices, vol. 20, no. 3, pp. 290-298, 1973. [101] J.W. Slotboom, and H.C. de Graaff, “Measurements of bandgap narrowing in Si bipolar transistors”, Solid-State Electronics, vol. 19, no. 10, pp. 857862, 1976. 206 [102] E.H. Nicollian, and J.R. Brews, MOS (Metal Oxide Semiconductor) Physics and Technology. John Wiley & Sons Inc., 1991, ch. 9, pp. 389404. [103] D.K. Schroder, Advanced MOS Devices. John Wiley & Sons Inc., 1987, ch. 1, pp. 26-36. [104] S. Iijima, and T. Ichihashi, “Single-shell carbon nanotubes of 1-nm diameter”, Nature, vol. 363, pp. 603-605, 1993. [105] V. Derycke, R. Martel, J. Appenzeller, and Ph. Avouris, “Carbon nanotube inter- and intramolecular logic gates”, Nano Letters, vol. 1, no. 9, pp. 453456, 2001. 207 APPENDIX A LIST OF PUBLICATIONS/PAPERS Journal Publications Related to the Ph.D. Work in this Thesis [1] W.K. Chim, K.M. Wong, Y.L. Teo, Y. Lei and Y.T. Yeow, “Dopant extraction from scanning capacitance microscopy measurements of p-n junctions using combined inverse modeling and forward simulation”, Applied Physics Letters, vol. 80, no. 25, pp. 4837-4839, 2002. [2] W.K. Chim, K.M. Wong, Y.T. Yeow, Y.D. Hong, Y. Lei, L.W. Teo and W.K. Choi, “Monitoring oxide quality using the spread of the dC/dV peak in scanning capacitance microscopy measurements”, IEEE Electron Device Letters, vol. 24, no. 10, pp. 667-670, 2003. [3] K.M. Wong, W.K. Chim and J. Yan, “Physical mechanism of oxide interfacial traps, carrier mobility degradation and series resistance on contrast reversal in scanning-capacitance-microscopy dopant concentration extraction”, Applied Physics Letters, vol. 87, no. 5, article no. 053504, pp. 053504-1 to 053504-3, 2005. [4] K.M. Wong and W.K. Chim, “Theoretical model of interface trap density using the spread of the differential capacitance characteristics in scanning capacitance microscopy measurements”, Applied Physics Letters, vol. 88, no. 8, article no. 083510, pp. 083510-1 to 083510-3, 2006. 208 Other Journal and Conference Publications [1] Y.D. Hong, J. Yan, K.M. Wong, Y.T. Yeow and W.K. Chim, “Dopant Profile Extraction by Inverse Modeling of Scanning Capacitance Microscopy Using Peak dC/dV”, Proceedings of the 7th International Conference on Solid-State and Integrated Circuit Technology (ICSICT 2004), 18 – 21 October 2004, Beijing, China, pp. 954-957. [2] Y.D. Hong, Y.T. Yeow, W.K. Chim, K.M. Wong and J. Kopanski, “Influence of interface traps and surface mobility degradation on scanning capacitance microscopy measurement”, IEEE Transactions on Electron Devices, vol. 51, no. 9, pp. 1496 - 1503, 2004. [3] Y.D. Hong, Y.T. Yeow, W.K. Chim, J. Yan and K. M. Wong, “Accurate Modeling of the Effects of Fringing Area Interface Traps on Scanning Capacitance Microscopy Measurement”, IEEE Transactions on Electron Devices, vol. 53, no. 3, pp. 499-506, 2006. 209 [...]... affecting the accuracy of SCM dopant profile extraction This project works towards the aim of obtaining accurate 2-D dopant profiles using SCM by inverse modeling In addition, the dielectric characterization using SCM will also be investigated Basically, the project consists of the following two major parts : • Dopant profile extraction and issues affecting dopant profile extraction using SCM It is necessary... Optical Microscopy (SNOM) Scanning Capacitance Microscopy (SCM) Magnetic Force Microscopy (MFM) Photon Scanning Tunnelling Microscopy (PSTM) Scanning Thermal Microscopy (STHM) Electrostatic Force Microscopy (EFM) Scanning Chemical Potential Microscopy (SCPM) Shear Force Microscopy (SHFM) Figure 2.1 : The different types of scanning probe microscopy techniques 9 2.2 Initial Developments of Scanning Capacitance. .. compared with the SIMS profiles (SIMS 1 and SIMS 2) Te initial (guess) dopant profile and the dopant profile after 45 iterations of inverse modeling are also shown 169 Figure 6.13 : Inverse modeling for the SCM experimental ΔC curve with the dopant profile from the analytic model used as initial guess 171 Figure 6.14 : Extracted dopant profile from inverse modeling using the dopant profile from the analytic... (EFM) [22], Scanning Capacitance Microscope (SCM) [2], Scanning Thermal Microscope (SThM) [23], Magnetic Force Microscope (MFM) [24] and Scanning Near-Field Optical Microscope (SNOM) [25] Figure 2.1 shows the different types of SPM Scanning Probe Microscopy (SPM) Scanning Tunnelling Microscopy (STM) 1981-1982 Scanning Ion Conductance Microscopy (SICM) Atomic Force Microscopy (AFM) 1986 Scanning Near... inverse modeling procedure 172 Figure 6.16 : Measured dopant profiles from SIMS and SCM extracted dopant profiles using the improved analytical model (with deep depletion effects accounted for) for Samples B,C and D 173 Figure 6.17 : Extracted SCM profile of the ultra-shallow p-n junction sample D using deep-depletion modeling The SCM profiles are compared and verified with the boron concentration on the... Comparison of the extracted SCM dopant profiles from 3 different measurement locations of Sample A using the improved theoretical model (with deep depletion included) with the SIMS dopant profile 167 Figure 6.11 : Inverse modeling for the SCM experimental ΔC curve showing the target ΔC , initial ΔC and the ΔC profiles at the 45th and 148th iterations 169 Figure 6.12 : Extracted dopant profiles (after 148 iterations)... curve with the dopant profile from the analytic model used as initial guess for Sample D 176 Figure 6.19 : Extracted dopant profile from inverse modeling using the dopant profile from the analytic model as initial guess for Sample D 176 Figure 7.1 : Simulated and experimental (measured) peak dC/dV magnitude plotted against dopant concentration 181 x Figure 7.2: FWHM of the differential capacitance characteristics... improve the status of SCM as a dielectric characterization tool, is currently still not available Therefore it is important to continue research in the area of quantitative dielectric characterization using SCM 1.3 Project Objectives The objective of this project is to develop an accurate quantitative model for the extraction of dopant concentration from 2-D scanning capacitance microscopy (SCM) measurements... low, dopant concentration In addition, the calibration curve method does not include the effect of the gradient in the dopant profile Therefore, when the measured dopant profile gradient is steep with respect to the dimension of the tip radius, the error in the estimated dopant profile will increase As a result, this led Marchiando et al to develop a regression procedure for determining the dopant profile. .. not vary with time and is more reliable for dielectric characterization than using the dc bias corresponding to the peak of the ΔC versus V curve; the later tracks the flatband voltage shift and is less reliable since the flatband voltage shift changes with time On the other hand, the C-V curve stretch-out due to interface traps is well known from MOS physics [59] Bowallius and Anand [60] have used . DIELECTRIC CHARACTERIZATION AND DOPANT PROFILE EXTRACTION USING SCANNING CAPACITANCE MICROSCOPY WONG KIN MUN (B.Eng SCM dopant profile extraction. This project works towards the aim of obtaining accurate 2-D dopant profiles using SCM by inverse modeling. In addition, the dielectric characterization using. Developments of Scanning Capacitance Microscopy (SCM) 10 2.3 SCM Dopant Profiling 11 2.3.1 Two-dimensional dopant profile extraction methods 11 2.3.2 Factors affecting the accuracy of SCM dopant