Chapter Four The Channel Doping in Strained-Si/SiGe NMOSFET: Effect on Narrow Width Device Characteristics and the Injection Efficiency of High-Energy-Tail Electrons In recent years, bandgap engineering in CMOS technology has received much attention. For example, when the silicon lattice is under tensile strain, the silicon bandgap is reduced. This bandgap reduction would translate into better CMOS performance. One of the methods to strain the silicon is to incorporate germanium into the silicon substrate [1]. In fact, the strained-Si technology is one of the alternatives that will be adopted beyond the bulk silicon CMOS technology scaling [2]. A layer of silicon is said to be under biaxial tensile strain when it is grown on top of a layer of relaxed silicon-germanium (SiGe). The biaxial strain is due to the lattice mismatch between silicon and germanium. In the electronic band structure, relaxed silicon exhibits 6-fold degenerate valleys in the conduction band. When the silicon is under tensile strain, the valleys then split into 4-fold and 2-fold valleys, forming a type-II band offset [3][4]. This would cause reduction in the intervalley phonon scattering as well as the effective mass of electrons in strained-Si NMOSFET Chapter Importance of Dopant Profile in Strained-Si/SiGe NMOSFET 102 during inversion. Thus, higher drive current arising from higher effective mobility of electron is desirable in high performance CMOS application. The effective mobility of electron increases with strain, which in turn, increases with the concentration of germanium in the relaxed SiGe layer [5]. However, the drive current enhancement is compromised when the sourcedrain engineering is not optimized. This is true if the dopant diffusivity in bulk Si and that in strained-Si/SiGe substrate is different for a given thermal budget. Take for example, the diffusivity of Arsenic (As) and Phosphorus (P) in SiGe is about and times higher than that in the bulk Si respectively [6][7]. Fig. 4.1 shows a typical SIMS profile of As for various virtual substrates processed with identical conditions. The junction depth increases significantly with the Ge concentration in the SiGe layer. This has important consequences like increasing the gate overlap capacitance and aggravating the short channel effect [8][9]. One of the solutions is to minimize the thermal budget during the fabrication process, thus reducing the change in dopant profile. In reality, this approach could reduce strain relaxation at the same time [10]. Take the Shallow Trench Isolation (STI) sidewall oxidation for example; it typically involves high temperature and long duration process step for bulk Si substrate. On the other hand, this step has to be replaced by a low thermal budget process, at the expense of damage repair for strained-Si/SiGe substrate. STI in general induces compressive strain on the transistor and this effect has significant impact on transistor performance when the transistor width reduces [11][12]. This counter effect on the biaxial tensile strained-Si performance especially in the Narrow Width (NW) devices remains to be seen. Chapter Importance of Dopant Profile in Strained-Si/SiGe NMOSFET 103 Fig. 4.1 SIMS profile of As with different Ge concentrations. It is observed that the junction depth is increased significantly when the Ge concentration in the SiGe layer is varied from 14% to 29% [7]. Another concern arises from the different dopant diffusivity in strained-Si/SiGe relative to bulk Si substrate, is the loss of transistor function in the long run in the former. This reliability issue can be caused by hot-carrier (HC) degradation in the strained-SiGe transistor. Despite several studies report on the hot-carrier performance of strained-Si/SiGe NMOSFET [13]-[15], there is no common understanding of the hot-carrier mechanisms in strained-Si/SiGe NMOSFET. For example, Waldron et al. showed that the impact ionization rate is ~ orders of magnitude higher in strained-Si than in the bulk silicon [13]. On the contrary, Lu et al. reported that the HC degradation in the strained-Si NMOSFET is ~ order of magnitude higher than that in the bulk Si counterpart [14]. This worse degradation was attributed to higher impact ionization efficiency arising from a narrower bandgap present in the former. From another perspective, this reduced bandgap resulted in a Chapter Importance of Dopant Profile in Strained-Si/SiGe NMOSFET 104 larger conduction band offset from the oxide potential barrier height has rendered better HC performance in the strained-Si than that in the bulk Si [15]. Thus, with these inconsistent findings, a better understanding of the HC performance of strained-Si devices is highly desirable. To maintain similar framework of HC mechanism discussed in the preceding chapter, a series of experiment was carried out on strainedSi/SiGe NMOSFET. This investigation serves to probe the injection efficiency of High-Energy Tail Electrons (HETE) into the oxide. As discussed in chapter three, the injection of HETE is vital in the hot-carrier degradation at operating voltage below oxide potential barrier. In this chapter, there are two main sections focusing on the characteristics of narrow width devices as well as the injection efficiency of HETE in strained-Si transistor. For the former, the width dependence of threshold voltage Vt in the strainedSi NMOSFET relative to that of the control bulk Si device is examined. The contrasting behavior of Vt, for decreasing transistor width W at a given channel length L, could be ascribed to the increased concentration of the channel dopant at the regions near the STI (shallow trench isolation)/gate edge of the strained device. Dopant enhancement is attributed to the abundance of interstitial defect sites located in both the strained-Si and the SiGe layer, due to the lattice strain arising from the STI process. In the second part of this chapter, the injection efficiency of HETE is investigated. Experimental evidence reveals that the amount of hot-electron injecting towards the Si/SiO2 interface is significantly reduced when the strained-Si device is subjected to HC stress. The suppression of the HETE could be attributed to the lower dopant concentration near the surface at the gate-to-drain region of the strained-Si. Chapter Importance of Dopant Profile in Strained-Si/SiGe NMOSFET 105 The importance of this chapter reveals that careful source-drain engineering is needed when fabricating strained-Si/SiGe NMOSFET. This concern arises because of the different dopant diffusivity in strained-Si. Especially for narrow width transistor, the strain relaxation at the active edges can cause the dopant profile to change rendering a different electrical characteristic when compared to larger width devices. The effect of dopant profile on hot-carrier reliability is also crucial. Apart from the effect of bandgap narrowing, which enhances the impact ionization efficiency, the reduced injection of HETE could also be an important consideration when evaluating on the HC performance of strained-Si NMOSFET. 4.1 Experimental Strained-Si layers of thickness of 20nm were grown on relaxed SiGe virtual substrates with 15 % and 20 % Ge concentration. Sacrificial oxidation during device processing yielded a final strained-layer thickness of ~ 15 nm. To prevent strain relaxation and germanium out-diffusion during processing, the STI liner oxide and the implant screen oxide were replaced with low temperature CVD-TEOS for minimization of overall thermal budget. Bulk silicon devices fabricated using an identical processing sequence served as control. All electrical tests were performed using a HP4155A semiconductor parameter analyzer. 4.2 Width Dependence of Threshold Voltage in NMOSFET As gate oxide thickness is one of the main factors influencing the electrical characteristics, it is intuitive to determine the electrical oxide thickness via the typical capacitance-voltage measurement as shown in Fig. 4.2. In general, an oxide thickness of ~3.2 nm is found in both strained-Si and bulk silicon transistors. Chapter Importance of Dopant Profile in Strained-Si/SiGe NMOSFET 106 Capacitance, C (pF) 10 Control 15% Ge 20% Ge -1.8 -0.9 0.0 0.9 1.8 Gate Voltage, Vg (V) Fig. 4.2 Capacitance-voltage characteristics of the different substrates for 100 µm (W) x 10 µm (L) NMOSFET Control 15 % Ge 20 % Ge Drain Current, Id (mA) 0.8 Vg - Vt = 1.2 V 0.6 0.6 V 0.4 0.2 0V 0.0 0.0 0.4 0.8 1.2 1.6 2.0 Drain Voltage, Vd (V) Fig. 4.3 Drain current Id versus drain voltage Vd with gate overdrive Vg - Vt as the parameter for 1.2 µm (W) x 0.18 µm (L) NMOSFET. Chapter Importance of Dopant Profile in Strained-Si/SiGe NMOSFET 107 Fig. 4.3 shows typical drain current Id as a function of drain voltage Vd with gate overdrive Vg – Vt as the parameter. The drive current for the 15 % Ge and the 20 % Ge devices show ~ % and ~ 17 % enhancement respectively when compared to the control device. This increment comes about when almost 100 % of the channel electrons occupy the 2-fold valley, reducing the effective in-plane transport mass, thus increasing the mobility [16]. Fig. 4.4 shows Vt as a function of device width W for a gate length of L = 0.18 µm. The threshold voltage Vt in the control is almost independent of W, and reduces slightly for W = 0.5 µm. The Vt rolloff is expected and is attributed to the Inverse Narrow Width Effect (INWE). However, the roll-off is only marginal in this case, which could be attributed to the more dominant effect of INWE over the opposing effect of the stress induced by the STI/gate edges [17]. For the strained-Si device, Vt increases significantly with decreasing W. The difference in Vt trend for both the devices has been found to be sensitive to the channel dopant concentration near the Threshold Voltage, Vt (V) STI/gate edges [18][19], suggesting different extent of boron diffusion. 0.4 Control 0.3 0.2 0.1 15% Ge Ldrawn = 0.18 µm Vd = 0.1 V 20% Ge 10 Device Width, W (µm) Fig. 4.4 Comparison of the threshold voltage Vt versus device width W for 0.18 µm (L) NMOSFET. Chapter Importance of Dopant Profile in Strained-Si/SiGe NMOSFET 108 It has been established that the population of interstitial defects determines the boron diffusion [20]. Generally, these defects could disrupt the crystal lattice particularly near the surface and could introduce large number of states. As a result, the strained-Si/oxide interface could degrade. Such defects could be probed by chargepumping technique, and the resulting trap density Nit is used as a measure of the quality of the strained-Si/oxide interface. The normalized Icp depicted in Fig. 4.5 indicates that the Nit increases when the W reduces, for both control and strained-Si devices. In general, the Nit in the strained-Si is larger than that in the control for any given W. Take for example; Icp in strained-Si is ~2.8 times higher than that in bulk Si. With reduced W, the fractional increase in the average maximum charge-pumping current 〈Icp,max〉 in the strained device could be ~7 times larger, as illustrated in Fig. 4.6. This finding suggested that the quality of the strained-Si/oxide interface is significantly degraded in the NW strained-Si compared to the control counterpart. This could imply that there is more damage sites in the strained-Si located in the shaded region denoted at the STI/gate edges as exhibited in Fig. 4.7. In the case when W is large, the damage sites at the STI/gate edges have less effect on Vt. On the other hand, when W is reduced, this could significantly affect Vt. Normalized ChargePumping Current, Icp (pA/µm) 60 (b)Dashed Lines: 20% Ge (a) Symbols: 15% Ge W↓ 40 W↓ 20 -2 -2 Gate Base Voltage, Vgt (V) Fig. 4.5 Normalized charge-pumping current Icp versus gate top voltage Vgt with W as the parameter for (a) control (b) 15% Ge and 20% Ge transistors with L of 0.18 µm. W is reduced from 20 µm to 0.5 µm. Fractional Difference in Average Maximum Charge-Pumping Current, 〈Icp,max〉 (a.u.) Chapter Importance of Dopant Profile in Strained-Si/SiGe NMOSFET 109 〈 I cp, max 〉 = 〈 Icp,max( SS ) 〉 − 〈 Icp, max( Control ) 〉 〈 Icp, max( Control ) 〉 20% Ge 15% Ge Control 10 Drawn Width, Wdrawn (µm) Fig. 4.6 Fractional difference in the average maximum charge-pumping current 〈Icp,max〉 for 0.18 µm (L) NMOSFET. Dashed line denotes the control used as the reference. D in Y Y’ L d w n P o ly G a te S o u rc e W d w n S T I/G a te E d g e Y Y’ P o ly G a te STI A c tive D e v ic e A re a STI Fig. 4.7 The Y-Y’ line indicates the device cross-section in the width dimension. The shaded regions are the STI/gate edges. Chapter Importance of Dopant Profile in Strained-Si/SiGe NMOSFET 110 4.2.1 Effective Width of Narrow Width NMOSFET In order to understand the width dependence of Vt and Icp current in strained-Si relative to the control transistor, the effective channel width needs to be determined. Firstly, the channel width deviation, defined as the difference between drawn width and effective width, is given by ∆W = W - Weff and is an important parameter in the NW device. Fig. 4.7 shows a comparison of the ∆W between the devices, estimated from the X-intercept of the maximum transconductance Gmax versus W plot. The control device shows negative ∆W, whereas the strained devices show positive ∆W. This difference could arise from the different channel dopant concentrations near the STI/gate edges, and their consequent effect on the channel depletion widths. Fig. 4.9 (a) shows the possible locations for boron diffusion at the STI/gate edge of the control. The interstitial rich STI/gate edges could cause the boron near the surface to accumulate in these regions, yielding a slightly higher concentration, hence a less negative ∆W. In other words, the diffusion of boron is retarded [21], and has significant impact on the NW device. As a result, the INWE impact on the Vt rolloff in Channel Width Deviation, ∆W (µm) the control is compensated as depicted in Fig 4.3. 0.08 0.04 0.00 -0.04 Control 15% Ge 20% Ge Fig. 4.8 Comparison of the channel width deviation ∆W for 0.22 µm (W) x 20 µm (L) NMOSFET. Chapter Importance of Dopant Profile in Strained-Si/SiGe NMOSFET 116 Similar experiment is conducted on devices with L = 0.5 µm as depicted in Fig. 4.14. Regardless of the Ige enhancement with Vb is observed in the strained-Si, the magnitude is very much smaller than that of the control. In summary, the observation shows that the injection of HETE in the strained-Si is very much suppressed in the short channel device relative to the long channel counterpart. -4 (b) Ib n ~ 2.23 -7 10 Current (A) Vb = V, -2.7 V 10 -8 Vb = V, -2.7 V n≈1 -9 10 Ig 10 e (a) Ig /Id 10 e -12 -11 Vg (=Vd) (V) 10 -4 -2 10 10 Ib/Id Fig. 4.14 (a) Gate injection current Ige and substrate current Ib as a function of Vg (=Vd) bias with reverse body bias Vb as the parameter. Symbols denote data from Vb = V measurement. (b) The corresponding Ige/Id vs Ib/Id characteristics of 0.18 µm (L) 15 % Ge N-MOSFET. Chapter Importance of Dopant Profile in Strained-Si/SiGe NMOSFET -4 10 (b) Strained-Si (a) Control Current (A) Ib 117 10 -4 10 -8 10 -12 Ib Ig -8 10 e Vb = -2.7 V e Ig -1.8 V -0.9 V 10 -12 Vg (=Vd) (V) Fig. 4.15 (a) Gate injection current Ige and substrate current Ib as a function of Vg (=Vd) bias with reverse body bias Vb as the parameter for control N-MOSFET. Symbols denote data from Vb = V measurement. (b) The corresponding Ige and Ib characteristics of the strained-Si devices. Symbols denote the 15 % Ge device and lines denote the 20 % Ge device. All data are measured on 0.5 µm (L) N-MOSFET. 4.4 Substrate Hot-Electron (SHE) Further experiments were conducted to study the observed L dependence of the Ige by SHE measurement technique. The gate injection current IgSHE and substrate current IbSHE as a function of Vb characteristics of the control device is illustrated in Fig. 4.15. Chapter Importance of Dopant Profile in Strained-Si/SiGe NMOSFET 118 -1 10 Current (A) Ib Control SHE -5 10 Ig SHE -9 10 Lch = 1.2 µm 10 -13 -10 -8 -6 -4 Reverse Body Bias, Vb (V) Fig. 4.16 Gate injection current IgSHE and substrate current IbSHE as a function of reverse body bias Vb for 10 µm (W) x 1.2 µm (L) control N-MOSFET. Device is subjected to substrate-hot-electron biasing mode. The arrow indicates a second “steplike” increase in IbSHE at Vb ≈ -8 V, corresponding to the onset of secondary impact ionization near the Si/SiO2 interface. For Vb< V, the IbSHE is largely due to the thermal generation leakage of the reverse bias substrate-to-channel and substrate-to-source/drain pn junctions, and IgSHE is negligible. For V <  Vb  < V regime, the concurrent increase in the IgSHE and the IbSHE depicts the onset of avalanche impact ionization in the substrate depletion region. For  Vb  ≈ V, a sharp increase in the IgSHE corresponding to a “step-like” increase in the IbSHE is observed. The salient feature of this SHE measurement is the “step-like” increase in the IbSHE, where it depicts the onset of secondary impact ionization near the Si/SiO2 interface. This yields hot-electrons that could easily be injected into the gate oxide. Chapter Importance of Dopant Profile in Strained-Si/SiGe NMOSFET 119 -1 10 Current (A) Ib Control 15 % Ge 20 % Ge SHE -5 10 Ig SHE -9 10 Lch = 1.2 µm 10 -13 -10 -8 -6 -4 Reverse Body Bias, Vb (V) Fig. 4.17 Comparison of gate injection current IgSHE and substrate current IbSHE characteristics of 10 µm (W) x 1.2 µm (L) N-MOSFET. Device is subjected to substrate-hot-electron biasing mode. Fig. 4.16 and Fig. 4.17 show the SHE characteristics of devices with L = 1.2 µm and 0.16 µm respectively. The independence of IbSHE on the channel length indicates that the majority of the II occurs near the source and the drain regions. This may imply that the IgSHE is weakly dependent on L as shown for the case in control devices for both Fig. 4.16 and Fig. 4.17. In contrast, the IgSHE for strained-Si devices has decreased as much as ~ orders of magnitude when the L is reduced from 1.2 to 0.16 µm. As a matter of fact, the channel length dependence of the IgSHE is more evident in Fig. 4.18 where the IgSHE of the strained-Si exhibits significant roll-off compared to the control. This rolloff is more severe for higher concentration of germanium. Chapter Importance of Dopant Profile in Strained-Si/SiGe NMOSFET 10 -1 Current (A) Ib 10 10 10 120 Control 15 % Ge 20 % Ge SHE -5 -9 -13 Ig SHE Lch = 0.16 µm -10 -8 -6 -4 Reverse Body Bias, Vb (V) Fig. 4.18 Comparison of gate injection current IgSHE and substrate current IbSHE characteristics of 10 µm (W) x 0.16 µm (L) NMOSFET. Device is subjected to substrate-hot-electron biasing mode. In addition, it is strongly correlated to the Vt rolloff characteristics of the strained-Si as illustrated in Fig. 4.19. The extracted Vt is based on the average of devices. At large L, the Vt of strained-Si is ~110 mV lower than that of the control, which is approximately the same as that reported in [27]. This difference is attributed to the band offset in the strained-Si. However, as the L is reduced, the difference in the Vt is increased. In this set of devices, the Vt difference is ~350 mV at L = 0.16 µm. In other words, the strained-Si exhibits a much more severe roll-off than the control. This is expected, as the dopant diffusivity is different in the strained-Si/Si1-xGex devices compared to that in the bulk silicon devices, rendering a more severe SCE in these strained-Si devices. It is generally accepted that the reduction in Vt is attributed to the increase in the channel depletion of the MOSFET [28]. Gate Injection Current, Ig SHE (A) Chapter Importance of Dopant Profile in Strained-Si/SiGe NMOSFET 10 -6 10 -8 121 Control 15 % Ge 20 % Ge 10 -10 0.1 10 Channel Length, Lch (µm) Fig. 4.19 Gate injection current IgSHE extracted at Vb = -10 V as a function of channel length L for the control and the strained-Si devices. Therefore, one of the important characteristics of the Vt roll-off depicted in Fig. 4.19 suggested that the channel depletion near the surface is larger in the strained-Si than in the control. This implies that the boron concentration in the channel is depleted or is reduced near the surface of the strained-Si N-MOSFET. This is highly possible since higher segregation of boron into the SiGe layer is observed, or its diffusivity in the strained-Si is higher than that in the SiGe layer [22][23]. This finding indicates that the SCE plays a major role in suppressing the injection of HETE in strained-Si NMOSFET. Chapter Importance of Dopant Profile in Strained-Si/SiGe NMOSFET Threshold Voltage, Vt (V) 10 122 Control 15 % Ge 20 % Ge -1 10 0.1 10 Channel Length, L(µ m) Fig. 4.20 Threshold voltage Vt as a function of channel length L. The data is the average of devices having width W = 20 µm. Esseni et al. has related the importance of dopant profile engineering to the injection efficiency of the HETE in the bulk silicon [29]. In fact, one of the most important challenges to-date would be the dopant profile engineering in strained-Si devices. Unlike the bulk silicon counterpart, Arsenic diffusion is enhanced while Boron diffusion is retarded in the former [23][30]. These differences have adverse impact on the short channel devices compared to the long channel devices where dopant profile engineering is more critical. Indeed, Goo et al. reported that the performance enhancement in strained-Si degraded linearly with the channel length L [31]. In reality, dopant profile engineering is also important from reliability perspective. It would, for example, determine the field contours in the channel-to-drain Chapter Importance of Dopant Profile in Strained-Si/SiGe NMOSFET 123 region, where it could impact on the HC performance of the devices [32][33]. In relation of the HC results to the apparent IgSHE rolloff in the strained-Si illustrated in Fig. 4.18, the boron concentration at the gate-to-drain junction near the surface would induce lower lateral and vertical fields [34]. The As profile in the LDD region near to the strained-Si/oxide interface, however, is to be similar to that in the bulk silicon when both are subjected to similar thermal budget [7]. The lower lateral fields could render the shift of the maximum impact ionization point further away from the surface, causing the current to flow further away from the Si/SiO2 interface. In this way, the probability of hot-electrons that bombard the interface is reduced. Therefore, it could be concluded that besides the narrowing of the bandgap that could affect the HC performance of the strained-Si NMOSFET, the dopant profile engineering at the gateto-drain junction is also an important consideration when performing similar studies. Chapter Importance of Dopant Profile in Strained-Si/SiGe NMOSFET 124 4.5 Summary The increase in the threshold voltage Vt and the positive channel width deviation in the strained-Si could be attributed to the high boron concentration at the STI/gate edges as the W is reduced. This enhanced concentration is the result of more interstitial defect sites available for boron to sink to. In the bulk Si, the boron concentration could also increase but in lesser extent, as shown by a less severe Vt rolloff. This suggests that the effect of the STI-induced damage could alter the dopant profile and compensate the Inverse Narrow Width Effect observed in the narrow width devices. From reliability point of view, the effect of dopant profile on the injection efficiency of HETE is more severe in strained-Si transistors. The role of HETE is vital in the hot-carrier induced damage at operating voltage below the oxide potential barrier as discussed in chapter three. Initial investigation showed that there is significant suppression of HETE in short channel strained-Si NMOSFET. Subsequently, SHE measurement technique was used to probe the injection of gate current IgSHE due to vertical field. Further analysis indicated that the IgSHE in the strained-Si exhibits strong channel length dependence but not for the case in the control devices. In fact, IgSHE correlates very well with the Vt versus L characteristics; it suggests that the suppression of HETE injection in the strained-Si could be related to the doping profile near the gate-to-drain region. One possible explanation is that boron segregates more into the SiGe layer than in the strained-Si layer. This caused the gate-to-drain region near the surface to be different with respect to the bulk silicon under similar processing conditions when the Chapter Importance of Dopant Profile in Strained-Si/SiGe NMOSFET 125 channel length is reduced. Lower dopant concentration in this region yields lower electric fields. Consequently, the shift of the maximum impact ionization point away from the surface would yield current flow deeper into the substrate. This effectively reduced the probability of hot-electrons injection towards the interface. These findings suggest that the dopant profile engineering is an important factor that would affect the HC studies of strained-Si N-MOSFET. In retrospect, the injection efficiency of HETE in bulk Si can be modulated via positive impact ionization feedback or e-e scattering mechanisms as discussed in previous chapter. The former, however, fails to vary the injection efficiency of HETE in strained-Si NMOSFET. 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[...]... 3.3, the hot- carrier induced damage in bulk Si arising from HETE becomes increasingly important as Vd decreases However, the influence of HETE on the hot- carrier degradation in strained-Si needs to be investigated By adopting the similar framework from chapter three, a series of channel -hot- electron (CHE) stress is carried out to determine the importance of high-energy tail electrons in the strained-Si/SiGe... Ib/Id, for instance Ib/Id = 103 , strained-Si exhibits ~ 1 order of magnitude smaller Ig/Id than that in the control, which is an indication of reduced hot- electron injection efficiency in the former In addition, the slope n of ~ 2.4 in the strained-Si is larger in relation to that of ~ 2.2 in the control, which implies that the barrier height seen by the hot- electron at the strained-Si/SiO2 interface... dopant profile engineering is more critical Indeed, Goo et al reported that the performance enhancement in strained-Si degraded linearly with the channel length L [31] In reality, dopant profile engineering is also important from reliability perspective It would, for example, determine the field contours in the channel-to-drain Chapter 4 Importance of Dopant Profile in Strained-Si/SiGe NMOSFET 123 region,... efficiency of HETE is more severe in strained-Si transistors The role of HETE is vital in the hot- carrier induced damage at operating voltage below the oxide potential barrier as discussed in chapter three Initial investigation showed that there is significant suppression of HETE in short channel strained-Si NMOSFET Subsequently, SHE measurement technique was used to probe the injection of gate current IgSHE... Dopant Profile in Strained-Si/SiGe NMOSFET [13] 128 N S Waldron, A J Pitera, M J Lee, E A Fitzgerald, and J A del Alamo, “Impact ionization in strained-Si/SiGe heterostructures,” in Proc Int Electron Devices Meeting Tech Digest, pp 813-816, 2003 [14] M F Lu, S Chiang, A Liu, S H Lu, M S Yeh, J R Hwang, T H Tang, and W T Shiau, Hot carrier degradation in novel strained-Si nMOSFETs,” in Proc Int Rel Phys... flow deeper into the substrate This effectively reduced the probability of hot- electrons injection towards the interface These findings suggest that the dopant profile engineering is an important factor that would affect the HC studies of strained-Si N-MOSFET In retrospect, the injection efficiency of HETE in bulk Si can be modulated via positive impact ionization feedback or e-e scattering mechanisms. .. larger in the strained-Si than in the control This implies that the boron concentration in the channel is depleted or is reduced near the surface of the strained-Si N-MOSFET This is highly possible since higher segregation of boron into the SiGe layer is observed, or its diffusivity in the strained-Si is higher than that in the SiGe layer [22][23] This finding indicates that the SCE plays a major role in. .. higher in the former Correspondingly, Fig 4.11 shows the gate tunneling current Igt as a function of oxide field Eox Indeed, it is observed that the strained-Si has lower Igt, but only marginal, due to the larger SiO2/strained-Si conduction band offset Though this increase could be singled out to account for the lower hot- electron injection efficiency, Chapter 4 Importance of Dopant Profile in Strained-Si/SiGe... the rise in channel temperature due to self-heating in the strained-Si will be extracted to assess the severity of self-heating on the hot- carrier induced damage in the next chapter Chapter 4 Importance of Dopant Profile in Strained-Si/SiGe NMOSFET 126 4.6 References [1] K Rim, S Koester, M Hargrove, J Chu, P M Mooney, J Ott, T Kanarsky, P Ronsheim, M Leong, A Grill, and H –S P Wong, “Strained Si MOSFETs... Importance of Dopant Profile in Strained-Si/SiGe NMOSFET 111 Apart from the top corners of the STI/gate edges, there are also additional interstitial rich regions located near the strained-Si/SiGe interface of the strained-Si as illustrated in Fig 4.8 (b) This is plausible since higher segregation of boron into the strained-Si/SiGe interface was reported [22][23] Take for instance, the diffusion of boron . in the strained-Si than that in the bulk Si [ 15] . Thus, with these inconsistent findings, a better understanding of the HC performance of strained-Si devices is highly desirable. To maintain. in the intervalley phonon scattering as well as the effective mass of electrons in strained-Si NMOSFET Chapter 4 Importance of Dopant Profile in Strained-Si/SiGe NMOSFET 102 during inversion Profile in Strained-Si/SiGe NMOSFET 112 4.3 Injection Efficiency of High-Energy Tail Electrons As mentioned in section 3.3, the hot-carrier induced damage in bulk Si arising from HETE becomes increasingly